Can you solder two 6‑layer PCBs together for BGA fanout?

Short answer

No. Soldering two finished 6‑layer PCBs together is not a viable way to get a "cheap 6‑layer" for large BGA fanouts. It creates uncontrolled impedance, unreliable interconnects, and severe assembly risks; it usually costs more than building the right stackup.

What breaks electrically when you stack boards?

A BGA fanout needs continuous reference planes and short, well‑controlled z‑axis connections. Two independent PCBs mated with solder cannot provide that.

• Return paths: The current return under high‑speed nets will be interrupted at the board‑to‑board interface. Even a sparse grid of soldered pads leaves large loop areas; expect extra inductance per interconnect on the order of tens to hundreds of pH, enough to degrade multi‑Gb/s links.

• Impedance: You cannot predict dielectric thickness or Dk across the soldered gap; characteristic impedance and skew are not controllable.

• Stubs: Through‑vias on each PCB become long stubs when signals try to traverse the interface. For links above ~3–5 Gb/s, stubs >0.3–0.5 mm typically require backdrilling; you can’t backdrill across a soldered joint.

• Registration: Layer‑to‑layer registration inside one PCB is typically ±50–75 µm. Board‑to‑board coplanarity and placement add more error, so any micro‑BGA style pad‑to‑pad mating grid will misalign.

Mechanical and assembly risks you can’t design around

Even if you created mating pad arrays and reflowed the two boards like a giant BGA, reliability is poor.

• Warpage: IPC‑6012 allows up to ~0.75% bow/twist on rigid boards; two large panels rarely share the same warp signature, so many joints will be starved or bridged.

• Surface planarity: LPI solder mask adds ~10–25 µm thickness variably; you won’t get a uniform standoff after reflow.

• Flux entrapment: A broad bonded interface traps activators and volatiles, raising CAF and corrosion risk.

• Rework: You cannot rework a buried joint grid without destroying one board.

Cost also goes up: you buy two PCBs, paste-stencil both sides, run an extra high‑risk reflow, and still may need underfill. Yield loss will dominate any perceived savings.

What actually works for BGA fanout by pitch?

• 0.8 mm pitch: A 6‑layer standard build (no HDI) often escapes with dogbones, 4/4 mil (100/100 µm) L/S, and 0.20–0.25 mm mechanical vias between pads, with solid L2/L5 planes.

• 0.5 mm pitch: Use 1+N+1 HDI with 0.10 mm laser microvias, capture pads ~0.25 mm. Via‑in‑pad filled and capped is common to keep escape channels.

• 0.4 mm pitch (and below): 2+N+2 HDI with stacked/staggered microvias, via‑in‑pad filled and plated over (VIPPO). Expect tighter L/S (75 µm typical) and careful plane spacing.

For high‑speed (>5 Gb/s) through‑vias, specify backdrilling to cut stubs. Maintain dense ground via stitching around BGA breakouts to preserve return paths.

Is an interposer a shortcut?

A purpose‑built HDI interposer under the BGA can be valid: it fans out with microvias and solders to the main board as a single BGA. This requires precise pad design, via‑in‑pad fill/cap, controlled thickness, and often underfill. It’s effectively a small HDI PCB, not a cost dodge.

Cost levers for a "cheap" 6‑layer without stacking

• Keep to one lamination cycle (avoid unnecessary buried vias).

• Use symmetrical, standard materials (FR‑4 Tg ~170) and common prepregs (e.g., 2116/1080/7628) for availability.

• Choose the coarsest L/S and largest annular rings that still escape your pitch.

• Prefer ENIG only when needed; otherwise budget finishes can save.

• Balance copper to reduce warpage and reflow risk.

What to put in your fab notes?

• Target impedance (e.g., 50 Ω single‑ended, 90–100 Ω differential) with layer assignments.

• Minimum L/S and drill/annular ring that actually escape your BGA pitch.

• HDI type (1+N+1 or 2+N+2), microvia size (e.g., 0.10 mm), VIPPO where required.

• Backdrill depths and tolerance for fast links.

• Acceptance criteria: IPC Class 2 or Class 3 per product needs.

Standards and compliance

We build and inspect to IPC Class 2 or IPC Class 3 acceptance criteria. Our quality management system is ISO 9001:2015 certified (certificate no. CN-2023-Q1156, SGS, valid to June 2027). RoHS and REACH compliance is supported for hazardous substance control.

Bottom line

Stacking and soldering two finished boards is electrically and mechanically unsound for BGA fanout and rarely cheaper. Use a proper HDI stackup or a designed interposer, with explicit impedance and via strategy in your fab package.