How do you use a PCB stackup impedance calculator?

A PCB stackup impedance calculator computes the trace width and pair spacing needed to hit target impedances using your dielectric constants, copper thickness, and layer geometry.

What a stackup impedance calculator needs

• Dielectric constant (Dk) at your signal frequency (e.g., FR‑4 ~4.1 at ~1 GHz; drops toward ~3.8–4.0 at several GHz)

• Dielectric thickness between trace and reference plane (h)

• Copper thickness t after plating (outer layers plate up; inner layers usually don’t)

• Structure type: microstrip (surface), coated microstrip (with solder mask), or stripline (internal)

• For differential: pair spacing s (edge‑to‑edge), target Zdiff (85/90/100 Ω are common)

• Solder mask thickness and Dk (mask ~2.9–3.5; 10–25 µm typical over traces)

• Frequency for dispersion estimates and loss budgeting

Microstrip or stripline?

Use microstrip when you need easy breakout and lower loss at a given dielectric height; use stripline for better EMI containment and tighter coupling to planes. For a given h, stripline needs narrower traces than microstrip to reach the same impedance because the field is fully inside the dielectric.

First‑pass equations you can check

IPC‑2141 closed‑form approximations are widely used for quick estimates:

• Uncoated microstrip (single‑ended):

Z0 ≈ (87 / sqrt(Er + 1.41)) * ln(5.98h / (0.8w + t))

• Symmetric stripline (single‑ended):

Z0 ≈ (60 / sqrt(Er)) * ln(4h / (0.67(0.8w + t)))

• Differential pair (microstrip or stripline, moderate coupling):

Zdiff ≈ 2 * Z0 * [1 − 0.48 * exp(−0.96 * s / h)]

Where w = trace width, s = edge‑to‑edge spacing, h = height to reference plane, t = copper thickness, Er = dielectric constant. Coated microstrip behaves like microstrip with a higher effective Er; expect a few ohms lower impedance than uncoated for the same w/h.

Worked example: 50 Ω microstrip on 7628

Stackup slice: FR‑4 prepreg 7628 cured thickness h ≈ 0.18 mm to a solid plane, outer copper t = 35 µm (1 oz), no mask for the estimate, Er ≈ 4.1 at ~1 GHz.

Using IPC‑2141 microstrip formula and solving for w yields w ≈ 0.305 mm for Z0 ≈ 50 Ω. Adding a 20 µm solder mask (Dk ~3.3) typically lowers Z0 by about 2–3 Ω; to restore 50 Ω you would narrow w slightly or increase h.

How to hit 90 Ω differential?

Using the same geometry above (Z0 ≈ 50 Ω for each line, h = 0.18 mm), plug the pair spacing s into:

Zdiff ≈ 2 * 50 * [1 − 0.48 * exp(−0.96 * s / 0.18)]

• If s = 0.30 mm, exp term ≈ 0.201 → Zdiff ≈ 90.3 Ω (no mask)

With a solder mask present, Z0 drops; increasing s to ≈0.33 mm typically brings Zdiff back near 90 Ω. Always verify against a field solver with the exact mask thickness and Dk.

What about core vs prepreg and glass styles?

Prepreg glass styles change thickness and Dk:

• 7628: ~0.18 mm per ply, high glass content, effective Dk often a bit higher; larger weave voids can skew impedance and skew delay.

• 2116: ~0.10 mm per ply, more resin‑rich; lower weave effect; good for tighter control.

Spread‑glass options (e.g., 3313, 2113 spread) reduce fiber‑weave variation, improving differential skew and impedance uniformity.

Solder mask, plating, and trace shape effects

Outer layers plate up during etch and copper plating, making traces thicker and slightly trapezoidal; both reduce impedance versus a rectangular cross‑section model. Use post‑plate t in the calculator, not base copper alone. Coated microstrip with 10–25 µm of mask over the trace lowers impedance by a few ohms; include mask thickness and Dk in the model.

Tolerances and verification

Industry impedance tolerance is typically ±10% (tight builds may specify ±8%). For production, validate with coupons and test per IPC‑6012 controlled‑impedance requirements. Specify target Z, tolerance, test frequency, and coupon location in your fabrication notes.

Accuracy tips and workflow

• Use supplier‑specific Dk/Df vs frequency instead of generic FR‑4 values.

• Iterate width/spacing to your exact stackup heights, not nominal catalogue numbers.

• Prefer 2D field solvers for final values; treat IPC‑2141 as a quick check.

• Communicate post‑plate copper thickness and solder mask data with your fabricator.

Fabricator data and turnaround

HyperPCB operates an ISO 9001:2015 certified quality management system (certificate no. CN-2023-Q1156, issued by SGS, valid until June 2027). Quotes are returned within 24 hours and DFM feedback within 1 business day.