How to manage and organize footprints in Altium Designer

Build a single-source footprint library with IPC‑7351 naming, standardized layers/courtyards, version control, and database-backed links to components in Altium.

Choose a library architecture

For a solo user, a paired SchLib + PcbLib or an IntLib is fine. For teams, use a database library (DbLib/SVNDbLib) or a managed content server so symbols, footprints, and parameters live in one controlled system. Keep the footprint library (.PcbLib) as the authoritative source; components reference footprints by exact name, not by guesswork.

Which library type should I use?

• PcbLib + SchLib: Simple, files in source control. Good for small teams.

• IntLib: Packaged, portable; release output only (edit the source libs).

• DbLib/SVNDbLib: Components in a database (SQLite/Access/MySQL, etc.) with columns for FootprintRef, MPN, Height, STEP path. Scales well and supports param uniformity.

Adopt a footprint naming scheme

Use IPC‑7351B style names so packages are machine-parsable. Examples:

• SOT95P240X120-3N (SOT‑23; 0.95 mm pitch, 2.40×1.20 mm body, 3 pins)

• QFN50P400X400X80-24N (QFN‑24; 0.50 mm pitch, 4×4×0.8 mm)

• BGA80P1150X1150-196N (BGA‑196; 0.80 mm pitch, 11.5×11.5 mm)

Append density if you maintain variants: -L/-N/-M for IPC Least/Nominal/Most.

Standardize mechanical layers and courtyards

Pick fixed layer roles and use them everywhere:

• Courtyard: Mechanical 15, 0.25 mm clearance beyond the maximum body outline (IPC‑7351B typical; push to 0.5 mm for hand-assembly).

• Assembly: Mechanical 13, true body outline and pin‑1 triangle.

• 3D Body: STEP with accurate height; set Component Height to match (e.g., 1.20 mm for SOT‑23).

• Fabrication: Mechanical 12 for detailed notes, polarity, chamfers.

Keep silkscreen at least 0.15 mm from exposed copper; minimum silk width 0.10–0.15 mm depending on your fab capability.

Pad stacks, masks, and paste settings

• SMT pads: Start from IPC‑7351B heel/toe/side goals; for 0.5 mm pitch QFN, toe ~0.20 mm, heel ~0.00–0.05 mm, side ~0.05–0.10 mm (tune to your assembler).

• Paste mask: 1:1 for small gull‑wing parts; reduce large pads by area (e.g., −10%) to control tombstoning. For QFN center pad, window the paste to target 50–70% paste coverage.

• Solder mask expansion: 0.05–0.08 mm typical positive expansion; minimum mask web ≥0.10 mm.

• Through‑hole pads: Define finished hole and annular ring (e.g., 0.80 mm finished hole with ≥0.30 mm annulus for connectors). Disable paste on TH pads unless needed.

Link symbols, footprints, and 3D models

In the component record, reference the footprint by exact library name. If multiple packages fit the same symbol (e.g., SOIC‑8, TSSOP‑8), list all footprints and set a default. Attach the STEP model at the footprint level so every component using it inherits consistent 3D.

Orientation, origins, and reference designators

• Rotation: 0° with Pin‑1 at upper‑left for ICs; for passives, treat the left pad as Pin‑1. Follow connector mating orientation as installed on the PCB.

• Component origin: Use centroid for pick‑and‑place; place a visible Pin‑1 marker on Assembly/Silk.

• Text: Place RefDes on Assembly layer; keep out of courtyard. Silkscreen RefDes may be omitted on dense boards but keep Assembly text mandatory.

Version control and lifecycle states

Put every source library under Git or SVN. One footprint per revision; bump the revision when pad sizes, courtyard, or masks change. Use lifecycle states (Draft → Review → Released → Deprecated). Lock released libraries; edits happen in a new revision branch.

How do I validate a footprint before release?

Run a checklist:

1) Dimensions: Compare pad geometry and body size against the datasheet; tolerance stack shown in notes.

2) Courtyard: 0.25 mm minimum clearance, no silk inside exposed copper.

3) Paste and mask: Gerber preview shows proper apertures; no mask slivers <0.10 mm.

4) DRC: Place the device in a test PCB and run rules (clearance, solder mask, paste).

5) 3D: Overlay STEP vs. footprint; height matches datasheet.

6) Print 1:1: Overlay on a real part for sanity.

Folder structure that scales

Use a predictable directory and file scheme so humans and scripts can find things:

• 00_Templates/

• 01_Passives/Resistor_Array/RAxx_PcbLib

• 02_IC/DFN/DFN50Pxx_PcbLib, QFN/QFN50Pxx_PcbLib, QFP/QFPxx_PcbLib

• 03_BGA/BGAxx_PcbLib

• 04_Discrete/SOT/SOT_PcbLib

• 05_Connector/Board_to_Board/…

• 90_Mechanical/3D_STEP/

Keep symbols in parallel folders; components in DbLib reference [SymbolRef, FootprintRef, MPN, Height_mm, STEP_Path, DensityLevel].

When should I create multiple variants of a footprint?

Create separate footprints for different density targets (L/N/M), for manufacturer‑specific lead forms, for alt body sizes on the same pitch, and whenever paste or mask strategy changes (e.g., QFN center‑pad patterns).

Migrating and cleaning existing libraries

Use the Footprint Manager to remap components to the new names, remove duplicates, and normalize mechanical layers. Add missing 3D bodies and set Component Height so assembly checks and enclosure fits are reliable.

Manufacturing note

If you want a build‑side review of tricky packages (QFN/BGA), we can fabricate to IPC Class 2 or Class 3, operate under an ISO 9001:2015‑certified QMS (SGS CN‑2023‑Q1156, valid to June 2027), and support RoHS/REACH for substance control.