Is my DIY digital stethoscope circuit gain and filter correct?
Published 2026-10-02
Short answer: target about 60–70 dB total gain, band‑limit to roughly 20–30 Hz high‑pass and 800–1,000 Hz low‑pass, and sample ≥8 kHz at 16‑bit. Below is a numeric way to check your math.
What signal level do heart sounds produce?
Typical chest‑coupled heart sounds are quiet: think tens of millipascals. Using a common electret spec of −44 dBV/Pa (≈6.3 mV/Pa), a 60 dB SPL event (~0.02 Pa) gives about 0.126 mV at the capsule. Murmurs and tapping can be far higher, so leave headroom.
Preamp gain calculation you can verify
Pick your ADC full‑scale first. Example: 1.0 Vpp (0.353 Vrms) single‑ended into an MCU/codec.
• Mic output at 60 dB SPL: Vmic ≈ 6.3 mV/Pa × 0.02 Pa ≈ 0.000126 Vrms
• Required gain: G ≈ 0.353 / 0.000126 ≈ 2,800 (≈69 dB)
Do this in stages to avoid oscillation and to manage noise:
• Stage 1 (non‑inverting): 20× (26 dB), e.g., Rf = 19 kΩ, Rg = 1 kΩ
• Stage 2 (non‑inverting): 20× (26 dB), e.g., Rf = 19 kΩ, Rg = 1 kΩ
Total ≈ 400× (52 dB). Add a third modest stage (≈7×, 17 dB) or digital gain/AGC to reach 60–70 dB when needed. This keeps analog headroom for louder events.
What band should I filter to?
Heart sounds S1/S2 fundamentals cluster around 20–150 Hz; murmurs and higher components extend to several hundred hertz. A practical bandpass is:
• High‑pass fc ≈ 20–30 Hz to remove motion/breath/handling
• Low‑pass fc ≈ 800–1,000 Hz to keep useful detail and ease anti‑aliasing
Example parts (Butterworth, unity‑gain Sallen‑Key targets):
• RC high‑pass (single pole before Stage 1): Rin = 100 kΩ, Cin = 68 nF → fc ≈ 1/(2π Rin Cin) ≈ 23 Hz
• 2nd‑order low‑pass after Stage 2: R1 = R2 = 10 kΩ, C1 = C2 = 18 nF → fc ≈ 1/(2π RC) ≈ 884 Hz
Use a 4th‑order low‑pass if your sampling rate is low (see next section) or if you’re in a noisy environment.
Electret or MEMS for the chestpiece?
Electret capsules are cheap and sensitive; bias with 2.2–4.7 kΩ to 2–5 V, then AC‑couple. MEMS mics offer tight tolerances and robustness; pick analog MEMS if you already designed an analog front‑end, or digital PDM/I2S MEMS to skip the ADC. Bottom‑ported MEMS need a sealed cavity to the chestpiece; electrets need airtight tubing and a felt damper to control resonances.
Anti‑aliasing and sampling rate choices
If you keep a 1 kHz analog bandwidth, sample at ≥8 kHz (16 kHz gives room for gentler filters). 16‑bit depth is strongly preferred; 12‑bit MCUs work only if your analog gain is high and noise is well managed. Place the analog low‑pass at ≈0.9–1.0 kHz with ≥2nd order; then a digital low‑pass and decimator can refine the band.
Op‑amp and protection specifics
Use a low‑noise, rail‑to‑rail input/output op‑amp with low 1/f noise (input noise ~5–10 nV/√Hz). AC‑couple the mic so DC bias and flicker noise don’t dominate. Add a 1 kΩ series resistor and back‑to‑back Schottky diodes to ground at the stage‑1 input (after the coupling cap) to tame handling transients.
Layout, grounding, and power to keep noise down
Keep the first stage physically close to the sensor. Star‑route grounds with a single analog‑to‑digital tie near the ADC. Guard and ground‑pour around the high‑impedance input node. Decouple every op‑amp rail with 100 nF ceramic + 10 µF bulk. Prefer a battery and a low‑noise LDO for analog rails; if you must use a switcher, place it off‑board or isolate it and filter aggressively.
Acoustics matter as much as electronics
Airtight coupling from chestpiece to transducer can change level by >20 dB. Use compliant tubing, ensure no leaks, and avoid hard cavities that ring; a thin felt layer over the port damps high‑Q peaks. Test with a metronome on the chestpiece to check transient behavior.
Is it safe to connect to a PC?
For hobby testing, run on battery only and avoid any conductive path to mains or earth. If you must tether to a computer, use a USB isolator and keep shields non‑patient‑contact. If you ever aim for human use beyond tinkering, learn the isolation and leakage limits in IEC 60601‑1 and design the barrier from the start.
Quick design checklist
• Sensor: electret (−44 dBV/Pa typical) or MEMS, airtight coupling
• Bias + AC‑couple: 2.2–4.7 kΩ bias, Cin × Rin → 20–30 Hz high‑pass
• Gain: 60–70 dB total, split across 2–3 stages
• Bandpass: low‑pass 800–1,000 Hz (≥2nd order), anti‑alias before ADC
• ADC: ≥8 kHz, 16‑bit preferred; set full‑scale to match gain
• Protection: input limiter + series resistor; ESD at the jack
• Power/layout: battery + LDO, tight analog ground, short input traces
• Validation: play back through speakers; compare spectrum to 20–1,000 Hz target
Manufacturing notes for your PCB
We build to IPC Class 2 or IPC Class 3 acceptance criteria and support RoHS and REACH compliance. HyperPCB maintains an ISO 9001:2015 certified quality management system (certificate CN‑2023‑Q1156, SGS, valid to June 2027). You can expect quotes within 24 hours and DFM feedback within 1 business day. Our partner factory AEGIS operates ISO 9001:2015, ISO 14001:2015, and ISO 45001:2018 systems, and also holds ISO 13485:2016 and IATF 16949—useful if your roadmap includes regulated or automotive derivatives.
One last check
Verify your numbers against: full‑scale target, mic sensitivity, expected SPL at the chest, and the product of stage gains. If Vout_rms ≈ Gtotal × (Sensitivity × Pa_rms), you’re in range; if not, adjust stage gains before chasing layout noise.
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