PCB prototype boards: practical stackups, impedance, and DFM checks
Published 2026-08-22
What is a PCB prototype board?
A PCB prototype board is a small‑lot build—typically 2–50 pcs, 2–10 layers, 1.0–1.6 mm finished thickness—used to validate signal integrity (e.g., 50/90/100 Ω lines within ±10%), assembly (e.g., BGA X‑ray), and test coverage (flying‑probe, coupons) before committing to volume.
Layer counts and stackup examples you can copy
For 4 layers at 1.6 mm, a robust starting point is: L1 (signal, 35 µm), 0.18 mm dielectric (often 2116+1080), L2 (GND), 0.80 mm core, L3 (PWR), 0.18 mm dielectric, L4 (signal). Keep signal copper at 35 µm unless current or thermal needs force 70 µm. For 6 layers targeting fine‑pitch BGAs, use L1 (sig), L2 (GND), L3 (sig), L4 (sig), L5 (PWR/GND), L6 (sig) with 0.10–0.20 mm interlayer dielectrics and a 0.5–0.8 mm center core for stiffness.
Which materials should I choose?
FR‑4 with Tg 150–170 °C is a solid default; it reduces Z‑axis expansion versus Tg≈130 °C grades during lead‑free reflow. Typical FR‑4 Dk at 1 GHz is 3.7–4.1 with tanδ≈0.015–0.02. Common prepregs: 7628 (thick), 2116/1080 (mid), 106 (thin). For RF above a few GHz, FR‑4 loss rises quickly; for 5–10 GHz S‑parameter work, consider low‑loss laminates with Dk≈3.0–3.5 and tanδ≤0.005 and specify the exact family in the RFQ.
Impedance targets with workable starting widths
Typical targets are 50 Ω single‑ended, 90 Ω differential (USB 2.0 HS), and 100 Ω differential (USB 3.x, PCIe, Ethernet). On the 4‑layer stack above with 35 µm copper, FR‑4 Dk≈3.8, and 0.18 mm to plane, a solder‑mask‑covered microstrip is near 50 Ω at ~0.30 mm width. A 100 Ω differential pair often starts around w=0.15–0.18 mm, s=0.20–0.22 mm; 90 Ω differential around w≈0.18–0.20 mm, s≈0.18–0.20 mm. For symmetric stripline with 0.18 mm dielectrics above and below, 50 Ω typically lands at w≈0.20–0.22 mm. Verify with a field solver using the fabricator’s Dk/Df and foil roughness and call out ±10% impedance tolerance with coupons and TDR reporting.
DFM checks before you request a quote?
- Track/space ≥ 0.10 mm (4 mil); finished via ≥ 0.25 mm; annular ring ≥ 0.10–0.15 mm; solder‑mask dam ≥ 0.10 mm; copper to board edge ≥ 0.25 mm.
- Aspect ratio (board thickness / finished hole) ≤ 8:1 for standard through‑holes; use more vias instead of tiny drills in thick stacks.
- Thermal reliefs: 4‑spoke reliefs on plane‑connected pads improve solderability and reduce tombstoning.
- BGA fan‑out: at 0.8 mm pitch, 0.30–0.35 mm pads with 0.20–0.25 mm microvias or 0.25 mm drills; at 0.5 mm pitch, consider via‑in‑pad (filled and capped) or move to 6 layers.
- Copper balance: avoid large unbroken copper on one side; use thieving or hatching to control warp and etch bias.
- Silkscreen clearance ≥ 0.15 mm from exposed pads; set mask expansion explicitly (e.g., 0.05–0.075 mm) to prevent slivers.
- Data package: RS‑274X Gerbers, Excellon drills, IPC‑356 netlist, impedance table, and a fab drawing calling materials, copper weights, finish (e.g., ENIG Ni 3–6 µm / Au 0.04–0.10 µm, or HASL), and test notes.
- Standards: design against IPC‑2221/IPC‑2152; acceptance per IPC‑A‑600/IPC‑6012.
Practical tolerances engineers actually use
Finished drill: ±0.05–0.075 mm for small vias. Board outline: ±0.10 mm. Solder mask to copper: ±0.05–0.075 mm. Inter‑layer registration: ±50–75 µm on well‑controlled tooling. Reserve GD&T only for critical‑to‑function features and relax elsewhere to improve yield.
When should I move from 2 to 4 layers?
Move up when you need an uninterrupted return plane, controlled impedance, tighter EMI/EMC margins, or when BGA escape requires inner‑layer routing. A 4‑layer with a solid ground plane typically cuts loop area, improves SI, and stabilizes decoupling immediately.
How fast can you quote and certify?
Quotes are returned within 24 hours and DFM feedback within 1 business day. Our quality management system is ISO 9001:2015 certified (certificate no. CN-2023-Q1156, issued by SGS, valid until June 2027). Boards can be built and inspected to IPC Class 2 or IPC Class 3 acceptance criteria when specified on the drawing. RoHS and REACH compliance is supported with material declarations on request.
Send your stackup and impedance table; we’ll return a DFM‑led quote within 24 hours. — Get a quote