What do the various USB‑C pins do? Functions, signals, and layout tips

Every USB‑C pin belongs to one of six groups: power (VBUS), ground (GND), configuration and cable power (CC1/CC2/VCONN), USB 2.0 data (D+/D−), high‑speed lanes (SuperSpeed/USB4), and sideband (SBU1/SBU2).

Pin groups at a glance

• GND (4 pins): return path and shielding reference

• VBUS (4 pins): deliver system power, default 5 V, optionally USB‑PD higher voltages

• CC1/CC2: orientation/role detection, current advertisement, USB Power Delivery; unused CC becomes VCONN to power cable electronics

• D+/D− (duplicated): USB 2.0 data; one logical pair appears on both plug orientations

• SuperSpeed lanes (4 differential pairs): high‑speed data for USB 3.x/USB4/Alt Modes

• SBU1/SBU2: low‑speed sideband for Alt Modes (e.g., DisplayPort AUX) and accessories

What do CC1/CC2 and VCONN actually do?

CC pins determine cable orientation (only one CC connects through the rotated plug), establish host/device roles (source vs sink), and advertise source current. The source presents a defined current on CC (about 80 µA for default USB, ~180 µA for 1.5 A, ~330 µA for 3.0 A), while the sink presents Rd ≈ 5.1 kΩ (±20%) to GND. USB Power Delivery messaging also rides on CC. The unused CC pin can be driven as VCONN (nominal 5 V) to power e‑marker ICs in cables; Ra in e‑marked cables is typically ~0.8–1.2 kΩ to GND for presence detection. Note: the well‑known 56 kΩ pull‑up belongs inside legacy A‑to‑C cables—do not place it on a Type‑C receptacle design.

VBUS and GND power behavior

VBUS defaults to 5 V. With USB‑PD, negotiated voltages can step above 5 V; PD 3.1 Extended Power Range supports up to 48 V and 5 A (240 W) when both source and cable are rated. Without an e‑marked 5 A cable, current is limited to 3 A. Multiple parallel VBUS and GND pins reduce IR drop and connector heating; tie all power and ground pins with wide copper and abundant stitching vias near the receptacle.

Which pins carry data?

USB 2.0 D+/D− is one logical differential pair duplicated on both sides of the reversible plug; on a receptacle, the A‑side and B‑side D+/D− are shorted so the hub or device sees a single 90 Ω differential pair (45 Ω single‑ended each line). SuperSpeed/USB4 traffic uses up to four high‑speed differential lanes arranged so the connector can flip. A USB 3.2 device typically uses one TX/RX pair; USB 3.2 Gen 2x2 and USB4/Thunderbolt use two lanes each direction. Because rotation swaps lane positions, designs use a high‑speed crossbar/mux to map the active lanes correctly. AC‑couple SuperSpeed lanes with 100–220 nF caps and route at 90 Ω differential; keep pair‑to‑pair skew tight (for short runs, matching within ~5 mil/0.127 mm is a practical target).

What are SBU1/SBU2 used for?

SBU pins are sideband lines that do not carry USB 2.0/3.x data. They are repurposed by Alternate Modes—most commonly for DisplayPort AUX (bidirectional, low‑speed) and for the audio adapter accessory. Treat them as sensitive analog lines: keep short, away from noisy aggressors, and protect with low‑capacitance ESD.

How does orientation flipping actually work?

Only one CC pin connects through the cable, revealing orientation. The duplicated D+/D− pins are shorted on the receptacle so USB 2.0 works without switching. High‑speed lanes exist in mirrored sets; a USB‑C mux/retimer steers the correct lane set to the PHY when the plug is reversed.

Design checks that save bring‑up time

Place low‑capacitance TVS diodes on D+/D−, SBU, and the SuperSpeed pairs (use sub‑0.3 pF parts on high‑speed). Use a PD controller to manage CC, VBUS power path, over‑voltage/over‑current, and VCONN. Keep the return path continuous under all differential pairs; avoid stubs at the receptacle footprint by using back‑drilled vias or via‑in‑pad where fabrication allows. Confirm cable current rating (3 A vs 5 A) during PD policy setup; never assume 5 A without an e‑marker. If you support Alt Modes, budget a crossbar/mux that can switch both SuperSpeed lanes and SBU pins cleanly.

Compliance and interoperability tips

Route SuperSpeed/USB4 pairs at 90 Ω differential and USB 2.0 at 90 Ω differential; verify insertion loss and return loss against your stack‑up using field‑solver data, not only generic calculators. Decouple VBUS close to the connector with a short, low‑inductance path and consider a hot‑swap/load‑switch for sinks. Tie the receptacle shield to chassis with a controlled impedance/EMI strategy (for example, RC or bead to system ground) consistent with your ESD plan.