What max current density to set for outer vs inner PCB layers?

For continuous DC on 1 oz copper and ~20°C temperature rise, set Jmax ≈ 70–90 A/mm² on outer layers and ≈ 45–60 A/mm² on inner layers.

Recommended Jmax values to enter

• Outer layer, 1 oz, ΔT ≈ 10°C: 40–60 A/mm²

• Outer layer, 1 oz, ΔT ≈ 20°C: 70–90 A/mm²

• Outer layer, 1 oz, ΔT ≈ 40°C: 120–150 A/mm²

• Inner layer, 1 oz, ΔT ≈ 10°C: 25–35 A/mm²

• Inner layer, 1 oz, ΔT ≈ 20°C: 45–60 A/mm²

• Inner layer, 1 oz, ΔT ≈ 40°C: 80–100 A/mm²

These are practical starting points that align with IPC‑2152 trends; always verify with your stackup, environment, and cooling.

How to compute Jmax from IPC‑2152?

• Pick an allowable temperature rise ΔT (often 10–20°C for electronics, higher only if validated by test).

• Use finished copper thickness tmin per layer (e.g., 1 oz ≈ 35 µm; use the minimum finished value, not nominal).

• From IPC‑2152 charts or a calculator, find the cross‑sectional area A = t · w needed for your current I at the chosen ΔT for external vs internal layers.

• Compute current density J = I / A. Enter Jmax a bit below that (e.g., 10–20% margin) so the analyzer flags any neck‑downs or hotspots.

Example: set Jmax for a 10 A rail on 1 oz copper

• Choose ΔT ≈ 20°C. Using the recommended outer‑layer Jmax ≈ 80 A/mm²: A = I / J = 10 / 80 = 0.125 mm². With t = 0.035 mm, the minimum width w ≈ 0.125 / 0.035 ≈ 3.6 mm.

• For an inner layer with Jmax ≈ 50 A/mm²: A = 10 / 50 = 0.20 mm² → w ≈ 0.20 / 0.035 ≈ 5.7 mm.

Validate with an IPC‑2152 tool; adjust Jmax if your environment (airflow, copper pour, planes) differs.

Does pulsed or AC current change the limit?

• Use Irms over the relevant thermal time window of the copper (typically seconds) to set Jmax. Short pulses with low duty cycle can exceed the DC Jmax if Irms stays within limit.

• Skin effect: copper skin depth δ ≈ 66 / √f(Hz) mm. At 100 kHz, δ ≈ 0.21 mm (>> 35 µm), so current is nearly uniform in 1–2 oz copper. Above a few MHz, current crowds toward surfaces; outer layers benefit, inner layers less so. Use Irms and, if δ ≪ thickness, treat effective conductive thickness ≈ 2·δ for two surfaces when estimating J.

Entering constraints in your Power Analyzer

• Set per‑layer Jmax rules using finished tmin. Many tools accept A/mm² directly; otherwise define I limits per segment using Jmax · t · wmin.

• Apply stricter local rules at bottlenecks (neck‑downs, via fields, connector fingers). J is governed by the minimum cross‑section along the path.

• For vias, compute current density on the barrel wall: Avia ≈ π · dhole · tplating · nvias. Limit Ivias so J = I/Avia stays below your layer Jmax, or use a dedicated (often lower) Jmax for vias due to poorer heat spreading.

• Model pours and parallel traces: the solver will split current; still, ensure each path meets Jmax using its minimum cross‑section.

Verification and common pitfalls

• Thermal reliefs and spoke patterns raise J locally; disable reliefs on high‑current pins or widen spokes.

• Copper resistivity rises with temperature; re‑check at the worst‑case board temperature, not only at 20–25°C.

• Cross‑check the analyzer against an IPC‑2152 calculator and do a sanity back‑calc: J = I / (t · w). On prototypes, place thermocouples or use IR to confirm ΔT under steady load.

• If you must push J higher, increase copper thickness, add parallel paths, shorten high‑current runs, or improve cooling before relaxing limits.

Notes on standards and build

• Use IPC‑2152 for current‑temperature relationships; acceptability can be tied to IPC‑6012 and your chosen Class. We can build and inspect to IPC Class 2 or IPC Class 3 acceptance criteria.