What should I require from a PCB assembly service?

Pick a PCB assembly vendor that can show IPC‑A‑610 Class 2/3 workmanship, inline SPI/AOI/X‑ray, MSD control per J‑STD‑033, and documented stencil and reflow parameters—and then put those in your PO.

What defines a reliable PCB assembly service?

A strong PCBA partner is traceable, process‑capable, and transparent. Ask for specific evidence, not slogans:

• Workmanship standard: IPC‑A‑610 Class 2 or Class 3 as applicable, plus J‑STD‑001 for soldering

• Process controls: solder paste inspection (SPI), post‑reflow AOI, and X‑ray for BGA/QFN

• Reflow: published thermal profiles matched to paste alloy (e.g., SAC305 peak ~235–250 °C)

• Stencils: thickness and aperture reduction rules; prove area ratio ≥0.66 on fine pitch

• MSD handling: J‑STD‑033 procedures, MSL labeling, and bake records

• ESD control: ANSI/ESD S20.20 program, ionizers at feeders, records for audits

• Test: boundary scan/ICT/FCT as needed; first‑article buyoff with change control

• Supply chain: authorized distribution first, AVL with param‑bound alternates, lot/date‑code traceability

DFM choices that make or break SMT yield

A few design details drive reflow quality more than most specs:

• Stencil thickness: 100–130 µm (4–5 mil) suits 0402–0.5 mm pitch; use 100 µm and reduced apertures for 0.4 mm pitch BGA/QFN; consider step‑downs for mixed technology.

• Apertures: keep paste area ratio ≥0.66; windowpane large thermal pads; 50–70% paste for QFN center pads to limit voiding.

• Solder mask: 80–100 µm LPI masks benefit from ≥75 µm dams; avoid merged pads on 0402/0201.

• Component spacing: ≥1.0 mm courtyard for rework access; ≥2.0 mm near tall parts; keep 0.25–0.30 mm between 0402 pads and adjacent copper.

• Silkscreen: keep 0.15–0.20 mm from pads to avoid bleed onto solderable areas.

How should I specify stencils and paste?

Tie the assembler’s process to your design constraints. For SAC305 no‑clean:

• Foil: 100 µm for fine‑pitch, 120–130 µm when no features <0.5 mm pitch; electropolished or nanocoated for 0.4 mm pitch/0201.

• Aperture tweak: 5–10% reduction on gull‑wing pads to reduce bridging; home‑plate on large chip pads; thieving for dense BGAs to stabilize wipe.

• Paste: match alloy and flux activity to reliability and ICT needs; water‑soluble flux improves ICT but requires post‑wash ionic cleanliness targets (e.g., ≤1.56 µg NaCl‑eq/cm² ROSE, when applicable).

Panelization, fiducials, and tooling for stable placement

Give machines what they need so they don’t guess:

• Rails: 5–10 mm on two long edges; include two 3.0 mm non‑plated tooling holes per rail.

• Fiducials: three global on top (1.0 mm copper, 2.0 mm clearance), mirrored on bottom if double‑sided; local fiducials near BGAs and fine‑pitch QFNs.

• Break‑offs: tab‑route with 2.0–2.5 mm tabs; mouse‑bite holes 0.8–1.0 mm dia on 2.0–3.0 mm pitch.

• X‑outs: align policy with your risk tolerance (e.g., 0% for dense BGAs); document bad‑marking on arrays.

Sourcing, MSD control, and compliance to require

For stable supply and predictable solderability:

• Use an AVL; allow param‑bounded alternates and package‑equivalent MPNs.

• Enforce MSL on the PO; typical bake for MSL3 is 125 °C for 24 h before reflow after exposure.

• Require lot/date code capture for every reel and PCB panel.

• For compliance, specify RoHS (2011/65/EU) and REACH (EC 1907/2006) requirements and request material declarations.

Inspection and test you should request

Adopt a layered approach:

• SPI on 100% of boards; AOI after reflow; X‑ray on BGAs, uBGAs, and QFNs with large center pads.

• First article: documented solder joint photos, coplanarity checks, and connector pin‑1 orientation verification.

• Test: choose boundary scan when JTAG access exists; ICT needs ≥0.9–1.0 mm test pads on 50–100 mil grid; functional test fixtures for power‑on risks.

How HyperPCB supports a smooth handoff before assembly

• Quality system: ISO 9001:2015 certified (certificate CN-2023-Q1156, SGS, valid until June 2027) to stabilize board inputs going to your EMS [1].

• Speed: quotes in 24 hours and DFM feedback within 1 business day to resolve assembly‑critical risks early [2].

• Board acceptance: boards can be built and inspected to IPC Class 2 or Class 3 acceptance criteria to match your assembly workmanship class [5].

• Substance control: RoHS and REACH compliance are supported for hazardous substances to keep your BoM and bare boards aligned on compliance [6].

• Extended quality domains: our partner factory AEGIS maintains ISO 9001:2015, ISO 14001:2015, and ISO 45001:2018 management systems [3], plus ISO 13485:2016 and IATF 16949 for regulated markets [4].

• RF material expertise: our partner factory manufactures its own high‑frequency laminates and supplies RF PCB fabricators in China, including publicly listed PCB companies—useful when your assembly involves mmWave or tight loss budgets [7].

Bottom line: lock down workmanship class, process controls, stencil/paste rules, panelization, test strategy, and compliance in the RFQ/PO, and validate them with data before the first build.